The semiconductor industry has recently experienced technological advances that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors operating at speeds of hundreds of millions of instructions per second to be packaged in relatively small, air-cooled semiconductor device packages. A by-product of such high-density and high functionality has been an increase in the number and complexity of the manufacturing processes, as well as an increase in the difficulties of maintaining satisfactory levels of quality control, analyzing the devices for defects, and providing a cost-effective product using such processes.
As the manufacturing processes for semiconductor devices and integrated circuits increase in difficulty, methods for testing and debugging these devices become increasingly important. Not only is it important to ensure that individual chips are functional, it is also important to ensure that batches of chips perform consistently. In addition, the ability to detect a defective manufacturing process early is helpful for reducing the number of defective devices manufactured, a cost avoidance methodology.
One type of defect that is prevalent in semiconductor device manufacture involves the generation of regions within metal structure of the device that lack sufficient metal, resulting in voids. Such voids are often created during canal (or trench) patterning, conductive film deposition, and canal and contact fill. The detection of voids is important because the circuit reliability depends upon having sufficient conductive material in these regions. One type of analysis that has been employed for defect detection is optical scanning. Optical scanning can be useful for analyzing patterns in the device. However, optical scanning is not as useful for analyzing shapes at the bottom of contacts and canals. In particular, when contact and canal fill includes opaque films like copper, metal below the films is not visible via optical scanning.
Some of the features of typical semiconductor device structures for which defect analysis is important include metal interconnects, devices, and other circuitry formed within the device. Many semiconductor devices now employ multiple circuit layers having multiple connections within each layer as well as between the layers. These additional layers hinder access to portions of the circuitry buried below or in between one or more of the layers. As the density of these layers and components increases, viewing and analyzing the structure for defects becomes more difficult, and in some cases, not possible. The difficulty, cost, and destructive aspects of existing methods for testing semiconductor devices for defects are impediments to the growth and improvement of semiconductor technologies.